A SiC MOSFET, as a third-generation power electronic semiconductor device, has a higher operating frequency, a better blocking characteristic and a higher voltage-withstanding rating than a traditional Si IGBT (silicon insulated gate bipolar translator), but on some medium and high voltage occasions, the voltage-withstanding rating of a single SiC MOSFET is still unable to meet the requirements, so that a plurality of SiC MOSFETs need to be connected in series for application. The series-connected SiC MOSFETs involve a potential difference in drive sources between individuals, so that a plurality of drive power supplies is required to supply power. In addition, a characteristic difference between parasitic parameters of the individual SiC MOSFETs and a drive chip will lead to a delay of drive signals of the series-connected SiC MOFETs, which causes a delay between series-connected drive signals of the series-connected SiC MOSFETs and then results in a dynamically equalized voltage imbalance of the series-connected SiC MOSFETs, thereby causing a voltage sharing imbalance of the SiC MOSFETs at the moments of conduction and cutoff. Therefore, it is very necessary to design a related series-connected SiC MOSFET drive circuit to guarantee synchronism of the drive signals.
The traditional series-connected SiC MOSFETs need to perform drive power supply clamping by a bootstrap capacitor under a single drive power supply to realize conduction of the series-connected SiC MOSFETs. Current main series connection modes for the SiC MOSFETs include: (1) a stray capacitor bootstrap mode: drive voltage conditions are realized by means of charging a bootstrap capacitor based on the bootstrap capacitor of an SiC MOSFET; (2) an RC gate charging mode: a gate RC circuit is charged by an RC buffer circuit, thereby raising a gate voltage and then realizing the conduction of the series-connected SiC MOSFETs; and (3) a dynamic voltage buffer mode: a source potential of the series-connected SiC MOSFETs is pulled down through the conduction of lower SiC MOSFET in series connection via an RCD (residual current device) buffer circuit and a gate clamping diode, so as to reach stabilizing conditions of a gate-source voltage parallel-connected stabilizing tube and guarantee the conduction of the series-connected SiC MOSFETs. However, in the above three modes, the series-connected SiC MOSFETs need to withstand a voltage of a high-voltage bus, respectively, in a short period of time when conducted in sequence. Furthermore, if a gate-source resistive capacitor is involved, the application voltage thereof needs to be considered, so as to adapt to a high voltage caused by source potential suspension in a series-connected structure.